VDSL2 refers to second-generation very-high speed digital subscriber line and the first draft standard (G.993.2) was proposed in May 2005 by the International Telecommunication Union (ITU). VDSL2 is an evolving DSL technology that aiming at delivering high data rate through copper pairs. The supported data rate can be up to 100 Mbps at each direction of downstream and upstream. Different profiles are created in order to meet the requirement of different deployment scenarios mostly related to the loop distance. The following table shows all the supported profiles:
VDSL2 profilesParameter value for profileFrequency planParameter8a8b8c8d12a12b17a30aAllMaximum+17.5+20.5+11.5+14.5+14.5+14.5+14.5+14.5aggregatedownstreamtransmitpower (dBm)AllMaximum+14.5+14.5+14.5+14.5+14.5+14.5+14.5+14.5aggregateupstreamtransmitpower (dBm)AllSub-carrier4.31254.31254.31254.31254.31254.31254.31258.625spacing(s)(kHz)AllSupport ofRequiredRequiredRequiredRequiredRequiredNotNotNotupstreamRequiredRequiredRequiredband zero(US0)AllMinimum net50 Mbit/s50 Mbit/s50 Mbit/s50 Mbit/s68 Mbit/s68 Mbit/s100 Mbit/s200 Mbit/saggregate datarate capability(Mbit/s)AllAggregate65,53665,53665,53665,53665,53665,53698,304131,072interleaverand de-interleaverdelay (octets)AllDmax20482048204820482048204830724096All1/Smax2424242424244828downstreamAll1/Smax1212121224242428upstream
Lower profiles such as 8a˜12b are used to support medium range loop length with a distance between 3 kft to 8 kft while high speed profiles 17a˜3a are used to support short range loop length of less than 3 kft. Only 30 MHz profile 30a is able to support 100 Mbps on both upstream and downstream while 17 MHz profile 17a can support aggregated 100 Mbps.
Time-domain equalizer is a technology aiming at shortening the channel response length so that the inter-symbol-interference between consecutive DMT frames can be alleviated. The time-domain equalizer is usually implemented as a FIR filter. The number of FIR taps depends on the loop length. Usually longer loop requires longer FIR filter. On the other hand, longer loop means lower transmission band since strong attenuation on the high frequency makes SNR low and effectively no bit can be loaded. Therefore, longer loop also implies low profiles such as 8.5 MHz etc.
The VDSL2 standard defines multiple profiles to support different frequency ranges from 8.5 MHz to 30 MHz. The backward compatibility requirement further extends the VDSL2 frequency as low as 1.104 MHz. Time-domain equalizer is usually used to reduce the inter-symbol-interference across neighboring symbols. To achieve an optimal system performance, the required number of TEQ taps is different for different profiles. High-speed profiles such as 17 MHz and 30 MHz require less TEQ taps due to short loop distance. Low-speed profiles such as ADSL2 spectrum 2.208 MHz or 8.5 MHz require higher number of TEQ taps due to longer channel response caused by the long loop distance. Therefore, it is very important to design cost-effective time-domain equalizer hardware to meet different profile requirement if a multi-profile ASIC solution is desired.